This invention relates to driver circuits which are particularly used as driver elements in a High Speed Data link to provide control of jitter in an output signal.
These co-pending applications and the present application are owned by one and the same assignee, International Business Machines Corporation of Armonk, N.Y.
The descriptions set forth in these co-pending applications are hereby incorporated into the present application by this reference.
Trademarks: S/390 and IBM are registered trademarks of International Business Machines Corporation, Armonk, N.Y., U.S.A. Other names may be registered trademarks or product names of International Business Machines Corporation or other companies.
Background: Signal drivers for high speed data links are known, as illustrated by U.S. Pat. No. 5,939,929, granted Aug. 15, 1999 entitled xe2x80x9cLow jitter low power single ended driverxe2x80x9d which could be used for ethernet repeaters and which produced a symmetric and therefor low jitter output signal in response to an input signal. This circuit required a first and second constant current which were combined to produce an output signal which was symmetric to the input signal received by the terminal circuit. For gigahertz frequencies Sun Microsystems, Inc. engineers designed a low phase noise LC oscillator for microprocessor clock distribution as described in U.S. Pat. No. 6,016,082, granted Jan. 18, 1992, where a continuously modifiable gigahertz frequency VCO circuit generated an output signal with a frequency that was dependent on the voltage on a control voltage input line. This output signal was provided to a level shifter output circuit which converts the current signal to a single-ended voltage that is supplied to the output driver which provides the output signal to a clock distribution network.
In spite of these recent efforts, a review of the patent literature shows a failure to recognize that there is jitter which is produced by pre-emphasis or pre-distortion on a driver, and pre-emphasis has become desirable, as illustrated by the iniband standard being developed.
The driver circuit of the present invention allows for level pre-emphasis in a driver, and yet compensates for level deployed jitter proved by pre-emphasis or pre-distortion on a driver signal to reduce the amount of jitter present at the receiver input of high speed data links. In accordance with the invention, the circuit used in the method for xe2x80x9cpre-distortingxe2x80x9d the data in both amplitude and pulse width in order to reduce overall jitter as described in the related application xe2x80x9cMulti-Level Jitter pre-compensation logic circuit for high speed data linksxe2x80x9d can employ the circuit of the present invention.
A multi-level method for properly ratioing pulse width amplitudes and pre-compensating for pulse width distortion is presented. The preferred embodiment of this invention employs a variable delay element for jitter control in the high speed circuits where its effectiveness have been demonstrated.
For completeness, while not developed at the request of the U.S. Government, this invention has been secretly demonstrated for use in a 2 gigabit per second links for the U.S. government. The U.S. Government is understood not to have any ownership interest in the invention.